As integrated circuits continue to scale downward in size, the finFET (fin field effect transistor) is becoming attractive for use with modern semiconductor devices. In a finFET, the channel is formed by a semiconductor vertical fin (as compared with a planar channel in a conventional CMOS), and a gate electrode is located and wrapped around the vertical fin. Creating a contact with the fin having the proper density is of serious concern for device operation. Reducing contact resistance is critical to improvement of speed of device operation. It is therefore desirable to have improved methods and structures to improve finFET performance.